<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Xiaoyang Lu on Blog | Chameleon</title><link>https://blog.chameleoncloud.org/authors/xiaoyang-lu/</link><description>Recent content in Xiaoyang Lu on Blog | Chameleon</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Mon, 29 Jun 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://blog.chameleoncloud.org/authors/xiaoyang-lu/index.xml" rel="self" type="application/rss+xml"/><item><title>I/O Analysis is All You Need: An I/O Analysis for Long-Sequence Attention</title><link>https://blog.chameleoncloud.org/posts/attenio-io-analysis-long-sequence-attention/</link><pubDate>Mon, 29 Jun 2026 00:00:00 +0000</pubDate><guid>https://blog.chameleoncloud.org/posts/attenio-io-analysis-long-sequence-attention/</guid><description>&lt;p&gt;Modern AI systems are often limited not only by how much computation they perform, but also by how much data they need to move. Moving data — or I/O — between large off-chip memory and small on-chip memory can be expensive, and this cost becomes especially important for data-intensive AI workloads. Xiaoyang Lu, a Research Assistant Professor at Illinois Institute of Technology, has been investigating how to attack this problem at its root, applying I/O analysis to design hardware that minimizes data movement rather than simply maximizing compute throughput.&lt;/p&gt;</description></item></channel></rss>