Join the Community Workshop on Practical Reproducibility in HPC, co-located with a major Computer Science conference in Atlanta on November 18, 2024. This workshop invites authors and reviewers to share insights on packaging and reproducing experiments in high-performance computing (HPC). Explore best practices, overcome reproducibility challenges, and contribute to a collective report aimed at advancing reproducibility in HPC. Travel support is available for top presentations. Submit your proposals by October 18!

Welcome back, Chameleonaires! As we transition from summer to our usual routines, check out the new and improved resources for getting started with Chameleon. Our engineers have been hard at work creating new tutorials, including interactive Trovi artifacts and live sessions. We've also updated our Getting Started guide to make it easier to use Chameleon’s powerful tools. Dive into our latest Trovi artifacts and tutorials to boost your research efficiency. Happy experimenting!

This month, we are excited to announce GigaIO nodes at TACC, the OpenStack Antelope upgrade at TACC and an upgrade guide for associate sites, and a new associate site CHI@NRP. Additionally, we finally have Raspberry Pi 5 support for CHI@Edge. There is also a brand new Trovi dashboard (under preview). And we also improved the reliability of phase 2 nodes at CHI@UC.
 

Exciting news for the HPC community! Registration is now open for the Community Workshop on Practical Reproducibility in HPC, happening November 18, 2024, in Atlanta. Don't miss early bird pricing and the chance to engage with leading experts on this crucial topic. Learn more about keynotes, discussions, and how you can be part of shaping the future of reproducibility in HPC...

Martin Putra, a 4th year PhD student at the University of Chicago, shares how he used Chameleon to build and test a scalable benchmarking tool for genomics workflows, uncovering insights that could lead to more efficient resource management for these computationally intensive tasks.

Exciting news for Chameleon users! We're introducing GigaIO's composable hardware at CHI@UC and CHI@TACC. This innovative technology allows for flexible GPU configurations, supporting up to 8 GPUs per node. Learn how this new feature can enhance your research capabilities and improve hardware utilization. Discover the specifications and unique advantages of our new composable systems in this blog post.

This month we celebrated 9 years of Chameleon, and shared the exciting news of Chameleon Phase 4! We also completed the openstack upgrade at CHI@UC, updated the Getting Started, and released a dev version of python-chi.

We are thrilled to announce that Chameleon, our experimental testbed for computer science research, has been awarded $12 million in funding from the U.S. National Science Foundation (NSF) for its fourth phase. Four more years of Chameleon!

Explore the cutting-edge research of Professor Dong Li from UC Merced as he tackles the challenges of managing multi-tiered memory systems. Learn how his innovative MTM (Multi-Tiered Memory Management) system optimizes page profiling and migration in large heterogeneous memory environments. Discover how Chameleon's unique hardware capabilities enabled this groundbreaking experiment, and gain insights into the future of high-performance computing memory management. This blog offers a glimpse into the complex world of computer memory hierarchies and how researchers are working to make them more efficient and accessible.

This blog post introduces the latest advancements in peripheral support for the CHI@Edge research testbed. It highlights the platform's holistic approach to integrating a wide range of sensors and cameras, opening up new possibilities for edge computing experiments. The post covers recent updates to documentation and tutorials, showcasing specific peripherals like the Waveshare Sense HAT-B and the Pi Camera Module 3. It also provides real-world examples of edge computing applications in fields such as precision agriculture and marine biology. Researchers are guided through the process of utilizing these new capabilities, with links to comprehensive tutorials on GPIO, sensors, and camera integration. This update represents a significant step forward in CHI@Edge's mission to facilitate cutting-edge research in edge computing and IoT applications.