Chameleon Changelog for August 2024

This month, we are excited to announce GigaIO nodes at TACC, the OpenStack Antelope upgrade at TACC and an upgrade guide for associate sites, and a new associate site CHI@NRP. Additionally, we finally have Raspberry Pi 5 support for CHI@Edge. There is also a brand new Trovi dashboard (under preview). And we also improved the reliability of phase 2 nodes at CHI@UC.
 

Early Bird Registration Open Until Sept. 30 for Workshop on Practical Reproducibility in HPC!

Seats are limited; act now to reserve your spot!

Exciting news for the HPC community! Registration is now open for the Community Workshop on Practical Reproducibility in HPC, happening November 18, 2024, in Atlanta. Don't miss early bird pricing and the chance to engage with leading experts on this crucial topic. Learn more about keynotes, discussions, and how you can be part of shaping the future of reproducibility in HPC...

Composable Hardware on Chameleon NOW!

Introducing new GigaIO nodes with A100 GPUs

Exciting news for Chameleon users! We're introducing GigaIO's composable hardware at CHI@UC and CHI@TACC. This innovative technology allows for flexible GPU configurations, supporting up to 8 GPUs per node. Learn how this new feature can enhance your research capabilities and improve hardware utilization. Discover the specifications and unique advantages of our new composable systems in this blog post.

Rethinking Memory Management for Multi-Tiered Systems

Exploring Efficient Page Profiling and Migration in Large Heterogeneous Memory

by Dong Li

Explore the cutting-edge research of Professor Dong Li from UC Merced as he tackles the challenges of managing multi-tiered memory systems. Learn how his innovative MTM (Multi-Tiered Memory Management) system optimizes page profiling and migration in large heterogeneous memory environments. Discover how Chameleon's unique hardware capabilities enabled this groundbreaking experiment, and gain insights into the future of high-performance computing memory management. This blog offers a glimpse into the complex world of computer memory hierarchies and how researchers are working to make them more efficient and accessible.

Expanding Horizons with CHI@Edge: New Peripheral Support

Enhancing Edge Computing Research with Advanced Sensors and Cameras

This blog post introduces the latest advancements in peripheral support for the CHI@Edge research testbed. It highlights the platform's holistic approach to integrating a wide range of sensors and cameras, opening up new possibilities for edge computing experiments. The post covers recent updates to documentation and tutorials, showcasing specific peripherals like the Waveshare Sense HAT-B and the Pi Camera Module 3. It also provides real-world examples of edge computing applications in fields such as precision agriculture and marine biology. Researchers are guided through the process of utilizing these new capabilities, with links to comprehensive tutorials on GPIO, sensors, and camera integration. This update represents a significant step forward in CHI@Edge's mission to facilitate cutting-edge research in edge computing and IoT applications.

Real-time Scheduling for Time-Sensitive Networking: A Systematic Review and Experimental Study

Optimizing Network Performance with Chameleon's Computing Power

In this study, Chuanyu Xue tackles the complex challenge of optimizing Time-Sensitive Networking (TSN) for real-world applications. Using Chameleon's powerful computing resources, he conducts a comprehensive evaluation of 17 scheduling algorithms across 38,400 problem instances. This research not only sheds light on the strengths and weaknesses of various TSN scheduling methods but also demonstrates how large-scale experimentation can drive advancements in network optimization. Readers will gain insights from Xue's journey, including key findings, implementation challenges, and valuable tips for leveraging Chameleon in their own research.